EDN

Improve phase noise by down-converting the VCO frequency

Phase noise is a critical parameter in most phase-locked loop (PLL) synthesizer applications. In radars, for example, phase noise at low-offset frequencies translates to the ability to discern between ...
The Engineer

Revolution and Evolution in Frequency Synthesis: How PLL/VCO Technology Has Increased Performance, Decreased Size, and Simplified Design Cycle

Microwave frequency generation has posed significant challenges to engineers over the years, requiring in-depth knowledge of analog, digital, and radio frequency (RF) and microwave ...
Electronic Design

Smaller PLL Synthesizers Become Design-Friendlier

Phase-locked-loop (PLL) frequency synthesizers are signal sources often employed in many types of electronic equipment. They show up as clock sources in high-frequency instruments and as local ...
Electronic Design

Driving the VCO in High-Voltage, High-Frequency Phase-Locked Loops

A phase-locked loop (PLL) is a feedback system that combines a voltage-controlled oscillator (VCO) and a phase detector in such a way that the oscillator signal tracks an applied frequency or ...
EDN

Small, Programmable 3-PLL Clock Synthesizer, Multiplier, and Divider Produces Independent Output Frequency

This post sponsored by Texas Instruments. The CDCE906 is one of the smallest and most powerful PLL synthesizers/multipliers/ dividers available. It can produce an ...
Business Wire

AKM Releases Fractional-N PLL Synthesizer with VCO Capable to Replace Variable Capacitance Diode Configurations

TOKYO--(BUSINESS WIRE)--Asahi Kasei Microdevices Corporation (AKM) launches a fractional-N PLL IC, the AK1574. A built-in VCO saves space, has low-phase noise, and low-power consumption. Uses include ...
The Engineer

Mouser stocks Analog Devices’ ADF4355 Wideband PLL with VCO Synthesizer

Mouser Electronics is now stocking the ADF4355 microwave wideband synthesizer from Analog Devices. Designed to increase performance and quality of wireless service per cellular base station, the ...
Design-Reuse

Creating a Frequency Plan for a System using a PLL

How do you ensure that every part of a system receives the clock it needs—without wasting power or sacrificing performance? The answer lies in creating a well-structured frequency plan built around a ...
Digi Times

TLSI introduces very-low-jitter, high-frequency PLL clock multiplier IC

TLSI today announced a very-low-jitter, high-frequency PLL clock-multiplier IC, the T98553, that is designed to replace high-cost crystal oscillators for use in serial data communications market. Save ...
Design-Reuse

Predicting PLL reference spur levels due to leakage current

A simple model can be used to accurately predict the level of reference spurs due to charge pump and/or op-amp leakage current in a phased-locked loop system. Knowing how to predict these levels helps ...