Pattern matching (PM) was first introduced as the semiconductor industry began to shift from simple one-dimensional rule checks to the two-dimensional checks required by sub-resolution lithography.

As integrated circuit (IC) designs continue to scale, the demand for efficient power management, performance optimization and reliable physical layout modification grows more critical. Meeting these ...

Enabling designers to perform block and cell physical verification from within layout environments such as Cadence's Virtuoso is Mentor Graphics' Calibre Interactive. This latest version in a ...