Xilinx Meets Performance Requirements of LTE Wireless Systems With New LogiCORE Turbo Encoder and Decoder SolutionsDelivers 5X throughput boost to developers of next-generation wireless systems ...
Touted as the industry's most cost-effective turbo encoder co-processor available to support the recently established 14.4 Mb/s third generation partnership project (3GPP) high-speed downlink packet ...
San Jose, Calif. — A MegaCore intellectual property (IP) block has been developed for the Cyclone family of CPLDs that can offload 3GPP high-speed downlink packet access (HSDPA) turbo encoding from a ...
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