EDN

Speeding AI SoC development with NoC-enabled tiling

Employing network-on-chip (NoC) technology in system-on-chip (SoC) designs has been proven to reduce routing congestion and lower power consumption. Now, a new NoC-enabled tiling methodology helps ...
Design-Reuse

Accelerating SoC Evolution With NoC Innovations Using NoC Tiling for AI and Machine Learning

A new trend is emerging in the design of high-end, multi-billion-transistor system-on-chip (SoC) devices. Referred to as “NoC tiling,” this evolutionary approach uses proven, robust network-on-chip ...
Infosecurity-magazine.com

A Trio of Approaches to Enhance Your NOC/SOC Collaboration

The lines between the network operations center (NOC) and security operations center (SOC) are blurring, even breaking down. We are seeing this from two directions: Most large enterprises with a ...
EDN

Why NoC tiling matters in AI-centric SoC designs

At a time when artificial intelligence (AI)-centric system-on-chips (SoCs) are growing in size and complexity, network-on-chip (NoC) tiling hand in hand with mesh topology can support faster ...
Design-Reuse

NoC Interconnect Fabric IP Improves SoC Power, Performance and Area

Imagine you have defined the structure of a system-on-chip and now you have to assemble all the IP blocks and make them communicate on the die. You have spent months rigorously selecting SoC IP that ...
Semiconductor Engineering

When Does My SoC Design Need A NoC?

Excluding the simplest offerings, almost every modern system-on-chip (SoC) device will implement its on-chip communications utilizing a network-on-chip (NoC). Some people question whether it is ...
CSOonline

Efficiency Through NOC/SOC Convergence

Under pressure to cut costs while raising service levels? Two SecureInfo executives say the pot of gold might lie in consolidating your network and security operations centers. Network Operation ...